Virtual machine extension (VMX) architecture allows multiple software programs and operating systems to use the same microprocessor logic (“hardware”) by allocating processor resources to various software applications and operating systems at different times.
The VMX architecture typically uses a virtual machine monitor (VMM) program that interfaces one or more software programs, such as a virtual machine (VM), to a single microprocessor or collection of processing elements. The guest software running on each VM may include a guest operating system and various guest software applications. Furthermore, an application and operating system running on a VMM may be collectively called a VM or a guest.
Typically, each VMCS entry is identified by a unique identifier, rather than an architecturally defined memory address. In at least one prior art example, the VMCS identification (ID) is a unique 32-bit identifier.
Two instructions supported in the VMX architecture include, VMREAD and VMWRITE, which read and write data from/to VMCS entries, respectively. These instructions, when executed, can use the VMCS ID to locate the appropriate VMCS entry to read from or write to. However, the VMREAD and VMWRITE instructions are typically able to read/write varying sizes of data, which can cause the VMREAD and VMWRITE to incur processing time and resources to access. Further processing penalties may be incurred if the VMREAD and VMWRITE access data that is not accessible. VMCS data may not be accessible to a VMREAD or VMWRITE instruction for reasons, such as a VMCS entry containing a write-only or read-only data field, or the data may be generally inaccessible by these instructions.
The processing penalties incurred by a VMREAD or VMWRITE in the VMX architecture can cause the performance of a computer system to suffer as well. Furthermore, prior art VMCS ID decoding systems have failed effectively address this problem.